The present invention relates, in general, to the field of true object generation in a video display generator. More particularly, the present invention relates to a true object generation system and method of especial utility in the generation of true objects in conjunction with a microprocessor (MPU) based video display generator.
True objects are video display generator hardware-intensive objects which are designed to move around on a video display screen and to run into, or collide with, other objects. Such true objects comprise a small video pattern which is stored in a particular location in the memory of a video display generator. These true objects can be positioned on the screen independently of where they are stored in memory merely by defining its vertical and horizontal position. By the use of true objects then, a video display screen may be easily animated and the object stored in the particular location in memory may be made to move across the screen merely by changing its start address.
In general, in a video display generator there is a vertical address comparator and a horizontal address comparator. During a vertical line count, one comparator looks at the actual line count as the Raster moves down the video display screen. A comparison is made to the position of each object and a signal is generated that describes a vertical "go" signal as a time for a true object to start. An identical operation happens horizontally where the horizontal position and horizontal picture element (pel) count across the screen generates a signal for a horizontal "go". These two signals are ANDed together to provide a signal to begin generation of a true object.
In the past, true objects have been generated by a technique known as bit mapping. Utilizing this method of encoding, an object size is limited by the amount of hardware, or registers, in which this data may be stored for retrieval. In an integrated video display generator, the number and size of these registers is directly related to die size and, hence, system cost. Moreover, the time necessary to fill these registers from the video display generator DRAM and, therefore, system operating speed is also directly related to the amount of memory which must be read into these registers. Therefore, it is highly desirable to limit the size of the registers and the time necessary to fill them.
Run length coding has previously been described as a means for generating a background display in a video generator. A representative system is described in U.S. Pat. No. 4,233,601 issued to Hankins et al on Nov. 11, 1980 for a display system. This patent describes a means of generating a Raster Display using run length encoded data. However, its application is to the entire Raster Display and not to the generation of true object data.